A special segment register specifies which 64-Kbyte section of the 1-Mbyte address space is being accessed by another 16-bit register. Intel uses an approach called segmentation. One idiosyncrasy of the 16-bit processors in this Intel CPU family is the way 20-bit physical addresses are generated from 16-bit registers. Howard Austerlitz, in Data Acquisition Techniques Using PCs (Second Edition), 2003 5.1.1 Memory Segmentation For more details, see Chapter 31, Section 31.1.7, Perspective: Segmented Addressing Solves the Synonym Problem. If memory is shared through global addresses, the TLB and cache need not be flushed on context switch 10 because the system behaves like a single address space operating system. Similarly, protection is guaranteed if identifiers are not duplicated. If two processes duplicate an identifier in their segment registers, they share that virtual segment by definition. The architecture does not use explicit address-space identifiers the segment registers ensure address space protection.

The segments provide address space protection and can be used for shared memory. It is this extended virtual address that is mapped by the TLB and page table. Processes generate 32-bit effective addresses that are mapped onto a 52-bit address space via 16 segment registers, using the top 4 bits of the effective address as an index.

Program status word 8088